Tecnology

M 54/M74HC192
M54/M74HC193
HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER
HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER

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HIGH SPEED
fMAX = 54 MHz (TYP.) AT VCC = 5 V
LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)BALANCED PROPAGATION DELAYS
tPLH = tPHL
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE WITH
54/74LS192-193

DESCRIPTION
The M54/74HC192/193 are ahigh speed CMOSSYNCHRONOUS UP/DOWN DECADE COUNTERS fabricated in silicon gate C2MOS technology. They have
the same high speed performance of LSTTL combined
with true CMOS low power consumption. The counter
hastwo separate clock inputs, an UP COUNT input
and a DOWN COUNT input. All outputs of the flip-flop
are simultaneously triggered on the low to high transition of either clock while the other input isheld high. The
direction of counting is determined by which input is
clocked. This counter may be preset by entering the
desired data on the DATA A, DATA B, DATA C, and
DATA D input. When the LOADinput is taken low the
data is loaded independently of either clock input. This
feature allows the counters to be used as divide-by-n
counters by modifying the count length with the preset
inputs. In addition the counter can also be cleared. This
is accomplished by inputting a high on the CLEAR
input. All 4 internal stages are set to low independently
of either COUNT input. Both a BORROW andCARRY
output are provided to enable cascading of both up and
down counting functions. The BORROW output produces a negative going pulse when the counter underflows and the CARRY outputs a pulse when the
counter overflows. The counter can be cascaded by
connecting the CARRY and BORROW outputs of one
device to the COUNT UP and COUNT DOWN inputs,
respectively, of the next device. All inputs areequipped
with protection circuits against static discharge and
transient excess voltage.
October 1992

B1R
(Plastic Package)

F1R
(Ceramic Package)

M1R
(Micro Package)

C1R
(Chip Carrier)

ORDER CODES :
M54HCXXXF1R
M74HCXXXM1R
M74HCXXXB1R
M74HCXXXC1R

PIN CONNECTIONS (top view)

NC =
No Internal
Connection

1/15

M54/M74HC192/193
I NPUT AND OUTPUT EQUIVALENTCIRCUIT

PIN DESCRIPTION
PIN No

SYMBOL

NAME AND FUNCTION

3, 2, 6, 7
4

QA to QD
CPD

Flip-Flop Outputs
Count Down Clock Input

5

LOAD

12

CARRY

13

BORROW

14

CLEAR

15, 1, 10, 9
8

DA to DD
GND

16

IEC LOGIC SYMBOL (HC191)

CPU

11

VCC

Count Up Clock Input
Asynchronous Parallel
Load Input (Active LOW)
Count Up (Carry)
Output (Active LOW)Count Down (Borrow)
Output (Active LOW)
Asynchronous Reset
Input (Active HIGH)
Data Inputs
Ground (0V)
Positive Supply Voltage

IEC LOGIC SYMBOL (HC193)

TRUTH TABLE
COUNT UP

COUNT DOWN
H

LOAD
H

CLEAR
L

FUNCTION
COUNT UP

H

H

L

NO COUNT

H
H

L
L

COUNT DOWN
NO COUNT

H
H
X

X

L

L

PRESET

X

X

X

H

RESET

X: Don’t Care2/15

M54/M74HC192/193
LOGIC DIAGAM (HC192)

3/15

M54/M74HC192/193
LOGIC DIAGAM (HC193)

4/15

M54/M74HC192/193
TIMING DIAGRAM (HC192)

TIMING DIAGRAM (HC193)

5/15

M54/M74HC192/193
A BSOLUTE MAXIMUM RATINGS
Symbol

Value

Unit

VCC
VI

Supply Voltage
DC Input Voltage

-0.5 to +7
-0.5 to VCC + 0.5

V
V

VO

DC Output Voltage

-0.5 to VCC + 0.5V

IIK
IOK

DC Input Diode Current
DC Output Diode Current

± 20
± 20

mA
mA

IO

DC Output Source Sink Current Per Output Pin

± 25

mA

DC VCC or Ground Current

± 50

mA

500 (*)

mW

ICC or IGND

Parameter

PD

Power Dissipation

Tstg
TL

Storage Temperature
Lead Temperature (10 sec)

-65 to +150
300

o
o

C
C

Absolute Maximum Ratings...