Mips
M I P S Reference Data
Add Immediate Add Unsigned And And Immediate Branch On Equal
addi
1
CORE INSTRUCTION SET FORNAME, MNEMONIC MAT OPERATION (in Verilog) add Add R R[rd] = R[rs] + R[rt] I I R[rt] = R[rs] + SignExtImm R[rt] = R[rs] + SignExtImm Add Imm.Unsigned addiu
addu and andi beq
OPCODE / FUNCT (Hex) (1) 0 / 20hex (1,2) (2) 8hex 9hex 0 / 21hex 0 / 24hex (3) (4) (4) (5) (5) chex 4hex 5hex 2hex 3hex 0 / 08hex (2) (2) (2,7) (2) 24hex 25hex 30hex fhex 23hex 0 / 27hex 0 / 25hex (3) dhex 0 / 2ahex
R R[rd] = R[rs] + R[rt] R R[rd] = R[rs] & R[rt] I I I J J R[rt] = R[rs] & ZeroExtImm if(R[rs]==R[rt]) PC=PC+4+BranchAddr if(R[rs]!=R[rt])PC=PC+4+BranchAddr PC=JumpAddr R[31]=PC+8;PC=JumpAddr
Branch On Not Equal bne Jump Jump And Link Jump Register
j jal jr
Load Byte Unsigned lbu Load Halfword Unsigned Load Linked Load Upper Imm. Load Word Nor Or Or Immediate Set Less Than
lhu ll lui lw nor or ori slt
R PC=R[rs] R[rt]={24’b0,M[R[rs] I +SignExtImm](7:0)} R[rt]={16’b0,M[R[rs] I +SignExtImm](15:0)} I R[rt] = M[R[rs]+SignExtImm] I IR[rt] = {imm, 16’b0} R[rt] = M[R[rs]+SignExtImm]
R R[rd] = ~ (R[rs] | R[rt]) R R[rd] = R[rs] | R[rt] I I R[rt] = R[rs] | ZeroExtImm R R[rd] = (R[rs] < R[rt]) ? 1 : 0
OPCODE / FMT /FT FOR/ FUNCT NAME, MNEMONIC MAT OPERATION (Hex) bc1t FI if(FPcond)PC=PC+4+BranchAddr (4) 11/8/1/-Branch On FP True Branch On FP False bc1f FI if(!FPcond)PC=PC+4+BranchAddr(4) 11/8/0/-div R Lo=R[rs]/R[rt];Hi=R[rs]%R[rt] 0/--/--/1a Divide divu Divide Unsigned R Lo=R[rs]/R[rt]; Hi=R[rs]%R[rt] (6) 0/--/--/1b add.s FR F[fd ]= F[fs] + F[ft] 11/10/--/0 FP Add Single FP Add {F[fd],F[fd+1]} = {F[fs],F[fs+1]} + add.d FR 11/11/--/0 Double {F[ft],F[ft+1]} 11/10/--/y FP Compare Single c.x.s* FR FPcond = (F[fs] op F[ft]) ? 1 : 0 FP Compare FPcond = ({F[fs],F[fs+1]} op c.x.d* FR 11/11/--/y Double {F[ft],F[ft+1]}) ? 1 :0 * (x is eq, lt, or le) (op is ==, > shamt 0/--/--/3 Shift Right Arith. swc1 I M[R[rs]+SignExtImm] = F[rt] Store FP Single (2) 39/--/--/-Store FP M[R[rs]+SignExtImm] = F[rt]; (2) sdc1 I 3d/--/--/-Double M[R[rs]+SignExtImm+4] = F[rt+1]
ARITHMETIC CORE INSTRUCTION SET
2
Set Less Than Imm. slti Set Less Than Imm. sltiu Unsigned Set Less Than Unsig. sltu Shift Left Logical Shift RightLogical Store Byte Store Conditional Store Halfword Store Word Subtract Subtract Unsigned
sll srl sb sc sh sw sub subu
R[rt] = (R[rs] < SignExtImm)? 1 : 0 (2) ahex R[rt] = (R[rs] < SignExtImm) bhex I ?1:0 (2,6) R R[rd] = (R[rs] < R[rt]) ? 1 : 0 (6) 0 / 2bhex 0 / 00hex R R[rd] = R[rt] > shamt M[R[rs]+SignExtImm](7:0) = I R[rt](7:0) M[R[rs]+SignExtImm] = R[rt]; I R[rt] = (atomic) ? 1 : 0M[R[rs]+SignExtImm](15:0) = I R[rt](15:0) I M[R[rs]+SignExtImm] = R[rt] R R[rd] = R[rs] - R[rt] 0 / 02hex (2) (2,7) (2) (2) 28hex 38hex 29hex 2bhex
FLOATING-POINT INSTRUCTION FORMATS FR
31
opcode
26 25
fmt
21 20
ft
16 15
fs
11 10
fd
6 5
funct
0
FI
31
opcode
26 25
fmt
21 20
ft
16 15
immediate
0
PSEUDOINSTRUCTION SET NAME MNEMONIC OPERATION blt if(R[rs]R[rt]) PC= Label Branch Greater Than ble if(R[rs]=R[rt]) PC = Label Branch Greater Than or Equal li R[rd] = immediate Load Immediate move R[rd] = R[rs] Move REGISTER NAME, NUMBER, USE, CALL CONVENTION PRESERVED ACROSS NAME NUMBER USE A CALL? $zero 0 The Constant Value 0 N.A. $at 1 Assembler Temporary No Values for Function Results $v0-$v1 2-3 No and Expression Evaluation $a0-$a3 4-7 Arguments No $t0-$t78-15 Temporaries No $s0-$s7 16-23 Saved Temporaries Yes $t8-$t9 24-25 Temporaries No $k0-$k1 26-27 Reserved for OS Kernel No $gp 28 Global Pointer Yes $sp 29 Stack Pointer Yes $fp 30 Frame Pointer Yes $ra 31 Return Address Yes
R R[rd] = R[rs] - R[rt] (1) May cause overflow exception (2) SignExtImm = { 16{immediate[15]}, immediate } (3) ZeroExtImm = { 16{1b’0}, immediate } (4) BranchAddr = {...
Regístrate para leer el documento completo.