1940-1950

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT
The SN54 / 74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when theOutput Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state. The SN54 / 74LS374 is a high-speed, low-power Octal D-type Flip-Flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock (CP) and Output Enable (OE) is common to all flip-flops. The SN54 / 74LS374 is manufactured using advanced Low PowerSchottky technology and is compatible with all Motorola TTL families.

SN54/74LS373 SN54/74LS374

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT
LOW POWER SCHOTTKY

20 1

J SUFFIX CERAMIC CASE 732-03

• • • • • • •

Eight Latches in a Single Package 3-State Outputs for Bus Interfacing Hysteresis on Latch Enable Edge-Triggered D-Type InputsBuffered Positive Edge-Triggered Clock Hysteresis on Clock Input to Improve Noise Margin Input Clamp Diodes Limit High Speed Termination Effects
LOADING (Note a)

20 1

N SUFFIX PLASTIC CASE 738-03

PIN NAMES

20

HIGH D0 – D7 LE CP OE O0 – O7 Data Inputs Latch Enable (Active HIGH) Input Clock (Active HIGH going edge) Input Output Enable (Active LOW) Input Outputs (Note b) 0.5 U.L. 0.5 U.L.0.5 U.L. 0.5 U.L. 65 (25) U.L.

LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 15 (7.5) U.L.

DW SUFFIX SOIC CASE 751D-03
1

ORDERING INFORMATION
SN54LSXXXJ Ceramic SN74LSXXXN Plastic SN74LSXXXDW SOIC

NOTES: a) 1 TTL Units Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 7.5 U.L. for Military (54) and 25 U.L. for Commercial (74) Temperature Ranges. The Output HIGHdrive factor is 25 U.L. for Military (54) and 65 U.L. for Commercial (74) Temperature Ranges.

CONNECTION DIAGRAM DIP (TOP VIEW) SN54 / 74LS373
VCC O7 20 19 D7 18 D6 17 O6 16 O5 15 D5 14 D4 13 O4 12 LE 11 VCC O7 20 19 D7 18

SN54 / 74LS374
D6 17 O6 16 O5 15 D5 14 D4 13 O4 12 CP 11

1 OE

2 O0

3 D0

4 D1

5 O1

6 O2

7 D2

8 D3

9 O3

10 GND

NOTE: The Flatpak version hasthe same pinouts (Connection Diagram) as the Dual In-Line Package.

1 OE

2 O0

3 D0

4 D1

5 O1

6 O2

7 D2

8 D3

9 O3

10 GND

FAST AND LS TTL DATA 5-1

SN54/74LS373 • SN54/74LS374
TRUTH TABLE LS373
Dn H L X X LE H H L X OE L L L H On H L Q0 Z* Dn H L X X

LS374
LE OE L L H On H L Z*

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance *Note: Contents of flip-flops unaffected by the state of the Output Enable input (OE).

LOGIC DIAGRAMS SN54LS / 74LS373
3 4 7 8 13 14 17 18

D0 D LATCH ENABLE LE 11 OE Q G

D1 D Q G

D2 D Q G

D3 D Q G

D4 D Q G

D5 D Q G

D6 D Q G

D7 D Q G

VCC = PIN 20 GND = PIN 10 = PIN NUMBERS

1

O0
2 5

O1
6

O2
9

O3
12

O4
15

O5
16

O6
19

O7

SN54LS /74LS374
3 11 4 7 8 13 14 17 18

D0 CP D Q Q CP D Q Q

D1 CP D Q Q

D2 CP D Q Q

D3 CP D Q Q

D4 CP D Q Q

D5 CP D Q Q

D6 CP D Q Q

D7

CP

OE
1 2

O0
5

O1
6

O2
9

O3
12

O4
15

O5
16

O6
19

O7

GUARANTEED OPERATING RANGES
Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — Low Parameter 5474 54 74 54 74 54 74 Min 4.5 4.75 – 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 – 1.0 – 2.6 12 24 Unit V °C mA mA

FAST AND LS TTL DATA 5-2

SN54/74LS373 • SN54/74LS374
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits Symbol S b l VIH VIL VIK VOH Parameter P Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 54 74 54, 74...